Which uController to learn?

John E. wrote:


After you've selected your second or third new microprocessor and made it work you'll realize that time spent learning the quirks of a new processor is less than time spent working around the deficiencies of an old one.
For each new application I look at what the application demands, which usually boils down to processor speed, peripherals, the available pin drive power, and the capabilities of the on-board EEPROM and flash. Then if one of the micros that I'm already familiar with works I use it -- otherwise I select a new one.
I will mention that for most microprocessors the verb is "use", but for PIC it's "suck it up and use" -- Microchip does a sterling job with peripherals, pin drive and features, but gawd I hate their architecture.
--

Tim Wescott
Wescott Design Services
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There's a pattern developing in this thread...
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John E. wrote:

Yes there certainly is. You've discovered the pic haters, welcome to my world. ;-) Once you learn to use several different archetectures, you'll see that they all suck in one way or another. 8052's are dumb in how they deal with internal/external storage and also their "output" vs "input" methods suck too because they don't have true directional i/o pins. AVRs, TI MSP430 and the rest all have their problems too whether it be an inabillity to supply drive current to a part or some other deficiency. They all have trade-offs. What you're seeing here is an unfair attack on PICs that seems to be made mostly by people that have hardly (if ever) used one, Tim excluded. As you said, PIC is king and it is for a reason, they work.
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Only if you can get to grips with the appalling op code set..... OK if you can program in C , I suppose.I can't/won't
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TT_Man wrote:

I only do assembler on the PIC too. What's wrong with the op-code set? It's RISC, it has 35 instructions, it's not supposed to be luxurious. It's supposed to be functional and fast....it succeeds. ;-) Just for background reference, I came from being a mainframe assembler programmer on a processor with a 10 bit op-code.
I know it's tedious sometimes, but when you only have one working register it's going to be that way no matter what.
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I don't think C is a great choice for small processors like the PIC. I wonder if a version of Tiny Pascal might not work better.
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no it's not, it has too few registers to qualify.

It always seemed kind of awkward and slow slow to me.
Bye. Jasen
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jasen wrote:

By whose definition? It stands for Reduced Instruction Set. 35 instructions is pretty reduced IMO.

Compared to what? 10MIPs on a few mA is pretty good in my book.
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says...

Actually, it stands for "Reduced Instruction Set Complexity". It has nothing to do with the number of instructions (PowerPC is certainly RISC, yet has hundreds of instructions in even more varieties), rather the complexity of the instructions. For example, no arithmetic operations on memory are allowed, only load/stores.

--
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wrote:

RISC essentially means that EVERY instruction takes ONE clock cycle, so your clock speed is your IPS -- CISC chips like the 80x86 take anywhere from 4-??? instructions per clock, they internally decode instructions through a micro-code rom in the CPU that sequences the internal processing elements of the chip through the steps neccessary to perform the instruction -- for instance -- a single instruction may read memory, add it to a register, and write the result back to memory -- all in one instruction, but across multiple clock cycles.
Therefore there are things a CISC chip can do in one ASM instruction that a RISC chip cannot do, simply because there is no way to perform the operation in a single clock cycle... for instance -- the 80x86 has a single instruction memory copy capability for moving data around -- makes things a little easier on the compiler developers.
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Nope. RISC == "Reduced Instruction Set Complexity". It has nothing to do with IPS. RISC is a philosophy. IPS is a design trade-off. The PowerPC *is* a RISC architecture. Some PowerPC implementations (e.g.. PPC750) tend to be one-cycle through the execution unit (plus decode, etc) where the Power5 is the same architecture and may be 5 to 15 cycles through the execution unit.
The x86 processors have memory reference arithmetec instructions (e.g.. ADD R,<memory>, thus CISC (the opposite of RISC). PowerPC has no like instruction.

It's RISC, not because it can do more than one thing per instruction, but because it can operate on memory with one instruction. BTW, RISC compilers are *far* easier to write; one of the reasons RISC was invented. RISC processors tend to be register rich, since they cannot operate on memory.
--
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This is an invalid generalization. Compiler complexity depends on many factors, and the raw size of the instruction set isn't even near the top of the list. Specialization is a more key factor, and RISC chips tend to have more specialized instructions. A CISC chip, for example, can usually add anything to anything, whereas RISC chips can only add registers, and sometimes add constants to a register.
The top of the list is usually "customer's requests for unique functionality".
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I never said it was! Perhaps you'd like to read what I wrote. RISC <> small_instruction_set was one of my main points.

Nonsense. If anything RISC's instructions are less specialized. There aren't any string moves to memory, for instance.

That is pretty much the definition of RISC, so yes... They generally have LOTSA register though. It's easier scheduling data when you have lots of places to put it. Register management is more complex with CISC processors.

Huh? When does a customer request functionality from a compiler?
--
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When you write compilers for a living, as I do, and the customer is the one who created the chip you're targetting. They're usually the ones who pay for embedded development tools.
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| jasen wrote:
|>> TT_Man wrote: |>>>> As you said, PIC is king and it is for a reason, they work. |>>>> |>>> Only if you can get to grips with the appalling op code set..... OK |>>> if you can program in C , I suppose.I can't/won't |>> |>> I only do assembler on the PIC too. What's wrong with the op-code |>> set? It's RISC, |> |> no it's not, it has too few registers to qualify. | | By whose definition? It stands for Reduced Instruction Set. 35 | instructions is pretty reduced IMO.
I guess some people thought RISC meant Registers In Surplus Capacity.
|>> it has 35 instructions, it's not supposed to be luxurious. It's |>> supposed to be functional and fast....it succeeds. |> |> It always seemed kind of awkward and slow slow to me. | | Compared to what? 10MIPs on a few mA is pretty good in my book.
I like that book.
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|---------------------------------------/----------------------------------|
| Phil Howard KA9WGN (ka9wgn.ham.org) / Do not send to the address below |
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Pretty much everyones (with the exception of the PIC fans). google "what is risc" sometime.
--

Bye.
Jasen
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jasen wrote:

What do you not understand about "Reduced Instruction Set Computer"? (A computer with a reduced instruction set???) A computer with about 30 instructions can be called a risc computer,as compared to the x86 group with about 500. Now if you want to claim that name for something else, you better explain that, because I think a lot of people dont agree with you.
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snipped-for-privacy@ppllaanneett.nnlll says...

The term is "Reduce Instruction Set Complexity".

No, it's a computer with a set of less complex instructions. The set can still be quite large and complex (e.g. PowerPC).

Not necessarily. If it has memory reference arithmetic instructions (e.g. ADD R,<memory>) it is NOT a RISC processor.

Anyone with a passing familiarity with computer architecture will.
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No, it isn't: <http://en.wikipedia.org/wiki/RISC

I have more than a "passing familiarity" with computer architecture (nearly 30 years, so far), & I don't agree with you.
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W "Some people are alive only because it is illegal to kill them."
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snipped-for-privacy@imagenoir.com says...

Funny, the people who invented the term (and the first example hardware) do. I tend to defer to them.
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