Which uController to learn?

Pretty much everyones (with the exception of the PIC fans). google "what is risc" sometime.

20 on a ATTiny2313 last year, megas to0 this year, up from 16.

I've only compared the ATTiny2313 and the AT90S2313

Those two certainly appear to be binary compatible in that the newer Tiny will run the older 90S programs and perform the same.

how often is 10 bits too few ?

Bye. Jasen

Quite often. Photography & audio work, just for two popular examples.

Lionel wrote in news: snipped-for-privacy@4ax.com:

Agreed. SOme tasks like laser scanning might call for a small dedicated controller, and you'd certainly want 16 bits there, especially if colour mixing was needed.

Even a small task like lin/log conversion, which many on Usenet advise me was best solved by code, needs to use 16 bits for accuracy over a decent range. Unless more tiny micros are made with 16 bit ADC and DAC on board, people will always be agonising over expensive analog computation IC's. Far better that we have a small number of cheap standard parts we can learn to code for. If I knew I could have this, I'd put more effort into learning it. I don't want to do it with a 40 pin device that needs a diploma to learn either, I want to do it with a 4 pin IC and some very simple high level language.

The way things are now, even real experts have argued and floundered over what best to advise. If more small micros had 16 bit analog I/O built in, people like me wouldn't even have to ask.

What do you not understand about "Reduced Instruction Set Computer"? (A computer with a reduced instruction set???) A computer with about 30 instructions can be called a risc computer,as compared to the x86 group with about 500. Now if you want to claim that name for something else, you better explain that, because I think a lot of people dont agree with you.

The term is "Reduce Instruction Set Complexity".

No, it's a computer with a set of less complex instructions. The set can still be quite large and complex (e.g. PowerPC).

Not necessarily. If it has memory reference arithmetic instructions (e.g. ADD R,) it is NOT a RISC processor.

Anyone with a passing familiarity with computer architecture will.

No, it isn't:

I have more than a "passing familiarity" with computer architecture (nearly 30 years, so far), & I don't agree with you.

you want to do serious audio *1 or imaging *2 on a 20MIPS 8-bitter ?

*1 for toys, or telephony, 8 bits are enough *2 I can't see 10 bits needed for an exposure meter, at low speeds switched gain is an option.

Funny, the people who invented the term (and the first example hardware) do. I tend to defer to them.

You think? Feel free to post authoritative reference.

Hell no! I was speaking generally. ;^)

Well, light meters for photographics work on a Log2 scale, so it requires more ADC resolution than you might expect at first glance. That said, a good sample & hold in front of a dual-slope converter would be perfectly suitable for most such purposes.

First, why don't you tell me what you so object to, since you were the person I responded to (and have said nothing more than "you're wrong).

If you'd actually read the whole post, you would've noticed that I've already posted a link to one reference. You can start there. Once you're done, you can check:

Be sure to let us all know if you manage to find a reference that agrees with your definition of 'RISC' as meaning: "Reduce Instruction Set Complexity", raher than "Reduced Instruction Set Computer".

How about Carnegie Mellon University School of COmputer Science?

"The most famous approach to these problems is called RISC, short for Reduced Instruction Set Complexity.

Or, University of Iowa Department of Computer Science

"As a result, processors designed according to the RISC (reduced instruction set complexity) philosophy..."'

Berkley

"A RISC (Reduced Instruction Set Complexity) processor, as used in most workstations today..."

Sun Microsystems:

"Many architectures, notably reduced instruction set complexity (RISC) architectures such as the Scalable Processor Architecture (SPARC.TM.)..."

MIT Supertech.csail.mit.edu/papers=3Fkuszmaul.ps

"It has been widely argued that one cannot afford to put any new =3Facademic=3F mechanisms into state-of-the-art RISC microprocessors because of the billion-dollar investment that is put into such microprocessors. That billion-dollar investment, however, is indicative of the fact that the =3FReduced Instruction Set Complexity=3F designs have become very complex indeed."

[more cherry picked webpages]

Except that all of those references are all at least 10 years more recent than the invention of the concept, & none of them are actual academic papers. (Hint: they're all 'backronyms': )

Googling from some of the same placess: CMU:

Gives 57 results, dating back as far as 1980, including actual published papers, course material & other formal references.

Berkely:

Gives 141 results similar types to those from CMU.

MIT:

106 results, as above.

Iowa U:

11 results. (Not exactly a CompSci pioneer, so not very surprising.)

Sun:

123 results.

Just to make my point 100% crystal clear, the above should've said: "Googling for 'reduced instruction set COMPUTER' from the same sites:" (As is obvious from the URLs themselves.)