Digital implementation of a control design

This article has an itty bitty bit of what you want:

I prefer to model the plant in the z domain as it's seen by the processor, then do all my Bode (and Nyquist) plot design in that domain. That way I know that I'm not making any further approximations when I go from my z domain model of the controller to my discrete-time real controller. It's the method I concentrate on in the book -- but I do show how to approximate an s-domain transfer function in the z domain by several popular methods.

Have you been working on this since September?

This is a good place to start.

What was wrong with the PID from last September? Did you try it?

Yes

That is evident.

I have provided you with the code already. It is the understanding that you need and don't have. Otherwise you wouldn't be asking.

My favorite is

One more thing. It has all been done before, many times. Search for my name and the links to .pdf files. They are examples of what you need to know.

Peter Nachtwey

I hope you advise him to sample at a high enough rate to obviate the need for much (if any) anti-alias filtering. The OP needs to realize that a one-sample delay at the sampling frequency creates a 180-degree phase lag.

Jerry

I don't do so in quite the same terms. I do advise them to avoid anti-alias filtering unless they're in a noisy environment, and give guidelines for selecting a sampling rate that is high enough.

Most anti-aliasing filtering plays merry hell with sampled-time control loops; it's usually better to smile and put up with the aliasing, or increase one's sample rate.

The only exception to this is a comb filter, where you integrate your inputs for one sample time, then sample-and-dump the integrator state. This gives an additional delay, true, but it also automatically puts a notch over each and every harmonic of the sampling rate, so any noise that may alias down to within the bandwidth of the control system is severely attenuated. Generally you can buy back the cost of the delay by increasing your sampling rate by less than a factor of 2, and in a noisy environment it can significantly quiet down the drive to the plant.

I just bought your book this week! So far so good!

one:

If your controllers bandwidth is much greater than the relative bandwidth of the system you are controlling then your continuous time design will do fine. Another way of saying this is if your sampling frequency is high enough (meaning much faster than the fastest dynamics of your process--more than 10 times) then you will come very close to the desired continuous time design. Also, remember that eigC = exp(eigC*Ts) Where eigC is the continuous time eigenvalues of your system (the one you designed) and Ts is the Sampling Interval (1/Fs or 1/sampling frequency).

Hope that helps. sam