digital analog conversion

Dear newsgroup community,
recently I came across the following challenge. There are several digital values which I want to convert to analog signals. Ok then, no problem.
Simply D/A conversion! But after converting the signals the general set up requires that these values should be held for about - let's say - a period of 5 minutes with practically no droop (decay of the analog value) at best! The D/A conversion itself takes place in a 1 MHz period, the values to be set have to pend for about 5 minues. I guess a hold-element (capacitor and op-amp) would be the obvious choice. But how should I dimension the capacitance and how can I affect the droop? Is it realistic to expect virtually no droop assuming an optimal configuration ? Isn't it, that with a large time constant the charging time would be endless, too? Please help me, if you can. I am almost become desperate. I need this for my graduation report.
Thank you in advance and many greets Veronica
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best!
a
me,
how about using a phase locked loop?
or sample and hold the digital signal?
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That's confused... on the _digital_ side, just buffer the data in a register. Don't flush the register.
Phase locked loops and "sample and hold" are all analog processing...
The description given is not clear enough to determine exactly what is needed, but it appears to be something like this:
+--------------+ +-----------+ +------------+ | Digital | | Digital | | Digital | Analog | Data |--->---| Data |--->---| to Analog |---> Output | Source | | Buffer | | Conversion | +--------------+ +-----------+ +------------+ | +-----------------+ Buffer | +-------+ | Clocking | | 5 Min | | trigger >-+--| One |------+ | Shot | +-------+
The "trigger" input might be derived from the data source, or from some other external event. The buffer retains data until either new data arrives or until the 5 minute one-shot fires. The D/A converter outputs an analog representation of the digital value. The output will vary as the incoming data varies, and will hold the last value for 5 minutes.
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PLL uses a divide by N stage... programmable divider. seems digital to me
output of the low pass stage is DC.
given that "digital values" covers a wide range of possibilities and analog output does not even necessarily mean DC it gonna be pretty hard to come up with any specific answer.
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The fact that one inner part of a PLL can be implemented using a digital circuit does not make it a digital processing technique, nor does it make either the input or the output digital.

Not necessarily.

"Digital values" just means there is finite set of discrete values (we were not given any clue to how large the set was though...). And all that "analog output" means is the range is continuous (but we were not given any clue to how large the range is...).
But regardless... if the output of an D/A conversion must hold its value for 5 minutes, *that* is going to be a DC value by most definitions! It may have been AC right up to the point where it went into hold mode... but a D/A conversion that holds a value for 5 minutes is attempting to produce DC.
Or, that is true if we are converting voltages or currents. If the D/A converter is converting frequencies or some other parameter, that's a whole different ball of wax. The OP didn't explicitly specify, but the "capacitor and op-amp" description of an analog hold mechanism clearly indicates that voltage is the parameter being converted.
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Veronica Matthews wrote:

Store each channel's digital value in a register and then either
1) feed each channel with its own D/A converter continuously or
2) cycle through the stored digital values (more rapidly then once in 5 min), feed them through the single D/A converter and switch the converter output to one analog hold circuit per channel. If you can cycle through all the values 10 times a second, then the analog hold circuit time constants will be 1/10 second instead of 5 minutes.
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Thanks for your numerous answers so far. For a better understanding let me elaborate on my intention. What I want to do is to handle several outputs (with the analog representation of the digital value) with just one single D/A converter. That means: feed the digital values through a single D/A converter and switch the converter output to one analog hold circuit per channel. Therefore the goal is to hold the analog values! The analog values to be hold are DC, that's true. Again, would it be advisable to use a capacitor and op-amp? How should I dimension the capacitance and how can I affect the droop? Is it realistic to expect virtually no droop? Isn't it, that with a large time constant the charging time would be endless? Maybe the solution is nearer as I can see? Maybe there is another way to solve the problem. But this "one D/A converter for multiple output channels"-configuration should be seen as basic condition!!!
Many greetings, Veronica
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It appears to me that you are indeed restricted to some type of a charged capacitor.
By "droop", I assume you mean discharge; and of course that is guaranteed to happen.

You don't have to have the same time constant for charging as you do for discharging.
| /| >--/\/\/\/\----|< |----+----/\/\/\/\---> Rin | \| | Rout | Zsource ------- Zload ------- | >----------------------+--------------->
Assuming the impedances Zsource and Zload are the same, then the charging time constant is determined by Rin and the discharge time constant is determined by Rout.
Of course, that is just for illustration purposes... and you'll quickly discover that it can't be discharged when you want it to be! So you don't actually want a diode there. Instead you want a switch that is high impedance when off, and low impedance when on, and then you strobe the switch when you want to set the voltage on the capacitor.

Bah, humbug! D/A converters are cheap. Use multiple D/A converters... among other benefits, the repeatable precision will be greatly enhanced. (Not to mention that most it could all be done in software...)
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Just to put my aim in perspective: I'm neither trying to fool you nor trying to get my homework solved (like a given individual presumed). Why I am talking about a basic condition with respect to the "one D/A converter for multiple output channels"-configuration is that this single D/A converter already exists in hardware. It is there, physical, for me to touch, already bought... And now I want to use this very D/A converter to feed several output channels. Of course I could buy a DAC for every channel but that's not my intention. The hardware setup does not allow to solder other devices on the board. So PLEASE just take it as it is! I want to solve the problem that way. So don't try to proselytize me like that jehovah's witnesses guys... ;-)
Hope you come up with more constructive suggestions!
Veronica
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Veronica Matthews wrote:

You feed the output from your existing D/A into an A/D. Do it by taking a wire off the original board to a new circuit board - you would have to do that anyway if you useed analogue techniques.
You take to output from the A/D to multiple D/As. You syncronise the latches in the D/As with the changes in channels of the data coming to the original D/A.
Dead simple.
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You asked, and got some very good responses. Your hardwired attitude does not allow further discussion...
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Have each analog out pulse switched into the primary of a 1 to 1000 step-up xfmr, apply secondary to HV rectifier, then apply resultant voltage to two leads (with gold plated alligator clips at one end), to each one of your ears!
Perion
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trying
use one gated voltage controlled amplifier (VCA) per channel. use a common reference for the input. use a switcher to rout your existing signal to the individual control element (CE) and gate input in sequence. set gate threshold to operate when signal is present.
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Veronica Matthews wrote:

If you would care to say why you insist on solving this problem using (unsuitable) analogue techniques when (simple) digital ones are the norm - you may get more enthusiasm.
The analogue sample and hold situation is this - you charge the storage capacitors from a low output impedance source and you monitor their voltage from extremely high input impedance buffer-amplifiers. You use techniques like guard-rings to minimise leakage currents. You consider putting the analogue circuitry in a precisely temperature controlled "box" to minimise drift and changes in offsets.
The starting point of the design is, of course, the exact specification - including what output error is permissable. Choosing the precision op amps and capacitor combination is next - this will probably be ruled by cost. The amplifier design will determine its input impedance and the permissable droop will determine the capacitor value. If the capacitors are too expensive, then choose a better op amp and try again. In comparison, the charging circuit design is likely to be easy.
During the design process you will have determined how much drift and change in offset can be allowed - taking in to account the droop and intrinsic error produced by your designed circuitry. Back to the specifications of the components and work out how much change in temperature can be permitted. If achieving that is too expensive, choose a better op amp and try from the beginning again.
In practice, this design block has to be considered in terms of the overall design. The input will not be dc. It may have an imposed dc level but the changing levels with time do mean that there are also ac components. Thus the bandwidth and transient response of the whole system have also to be considered. They may not matter, but the questions have to be asked.
Then you go back to the person who set the requirement that analogue techniques, rather than digital ones, be used. You give him the bill for the design work to date. You tell him how many orders of magnitude that requirement has already cost and is going to cost. You bring your CV up to date and move to a company that is likely to stay in business..
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Dont try to hold the analog value.store/ hold the digital input instead.. Much easier to do.
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