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------------ 5V | | resistor (R2-1K) | | resistor R4(1k) |---------------- |-----------O | | | O--resistor---Transistor (T1) --------------resistor R3(33k)---Transistor (T2) (R1 33k) | | Vin | | Vout | | O---------------------------------------------------------------------------
--------O Ground
open with notepad
Please help with my homework question, I have been trying to understand the circuit above, could anyone drop me some hints ?
Figure 2 shows two bipolar switches (inverters) in cascade, The first is driven by a perfect square-wave input signal with zero source impedance, which switches between 0 to 5V. Swithcing time for the first switch are ton1 = 82ns and toff = 454ns. For a second switch ton2 =
85ns and toff2 = 639ns. The large variation in toff is mainly due to the differences in Ib(off) of the switches. Each transistor has Vce(sat) = 0.2V and Vbe(on) = 0.7V
a) Draw an equivalent circuit that models the input section of the first switch and its signal source when Ib1(off) flows. Calculate Ib1(off)
b) Now Draw an equivalent circuit that models the input section of the second switch and its signal source when Ib2(off) flows. Hence calculate Ib2(off)
c) For the first stage, td1 = 20ns, tf1 = 62ns, ts1 = 77ns and tr1 = 377ns. The second stage has td2 = 20ns tf2 = 65ns, ts2 = 102ns and tr2 = 537ns. To determine the switching delays at the output of the combination (ie at the collector of T2) it can be assumed that T2 starts to switch when the collector of T1 reaches 2.5V Sketch waveforms of the input signal, the voltage at the collector of T1 and the output voltage to illustrate how the above switching times apply; indicate the values on the waveforms.
I have been seeking for the answer for the last few weeks and I don't still don't understand. Although it is homework, I'd like to have to hints to start off with. Thanks Jack