simulating a digital control loop

This is not a lot. The loop cutoff frequency can hardly be done higher then 1/(6 x total delay in the loop), so if you run at 25kHz, it is going to be 4kHz or so. You probably want at least 20dB of feedback, so

400 Hz it is; unless real fancy feedback arrangements. Pretty slow.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

I could tolerate a 1 millisecond risetime, which is in fact in the ballpark of 400 Hz. If I run at 50K, things should be OK. I can maybe run at 100K, which gives me 1000 CPU cycles per whack. This is a

32-bit machine with a single-cycle multiply.

John

Depends on the C compiler, I guess. If I were doing this in assembly on a 68332 with a 20 MHz clock, I'd have no problem doing this PID in

10 microseconds. You'd think a 100 MHz ARM, with a single-cycle multiply, could match that.

This will be interesting.

John

I am still considering doing the sim in PowerBasic, but LT spice has all those nice graphics and scope probes, and it's easy to fiddle values and save files and print and stuff. Just easier to drive.

PBCC would of course do the time-sample and quantization bits easily.

John

On a sunny day (Mon, 29 Mar 2010 16:16:55 -0700) it happened John Larkin wrote in :

Why not 2 DACs, and do the current limit voltage thing analog? Or is it just an excercise in digital?

The uP only has one dac. And it would take more parts to do it analog... I only have one pass transistor. The processor knows everything can do the voltage:current mode switch, and optimize the loop response in both modes, and do all the protections. Code is free on a production basis and doesn't take up board area.

I woke up in the middle of the night and decided to count parts. I've been working on this circuit so much in the last three days that I can literally see it in my head and stroll around and count the parts. I got 68 parts in each channel. Times 12 channels, plus VME interface,

13th control processor, power supplies, LEDs, and BIST, that will be about 1000 parts. That's a lot; I should pare it down some if I can.

I need a current-dumper for when I'm operating in voltage-regulator mode, to give some minimum load to the source follower. I can use an LND150 depletion fet: ground the gate, connect the source to a uP port pin, then the drain becomes the dump. Saves me two parts.

John

Why not use Matlab, Scilab, Mathcad etc? I do simulations for motion control all the time. I use a Trunc() function in Mathcad to simulate quantizing. I also have functions for generating noise.

Peter Nachtwey

In my experience the general-purpose math package route works very well with motion control -- things are generally far more linear and (with the exception of friction) if they're nonlinear they generally have just a few salient nonlinearities so you know what you have to model.

Circuits -- and switching amplifiers specifically -- tend to have lots of nonlinearities that may or may not matter, many more parts whose dynamics may or may not matter (or matter under different operating conditions, because of those nonlinearities), and they're just plain more opaque in operation. Add to that the fact that the world is flooded with excellent circuit simulation packages, and the attraction of simulating one's digital controller inside the circuit simulator becomes very strong.

On a sunny day (Tue, 30 Mar 2010 07:02:15 -0700) it happened John Larkin wrote in :

I once dream t I was an electron, moving through the ciruits. Poor electrons, the things we do to them.

I woke up at 3:30 last night because computers started beeping... alarms... power glitch, rare here, but the server stuff did not re-start. Have to add a big relay and a watchdog some day. Finised the millivolt measurement part of my scope-PIC. You can move a cursor over the waveform and it displays the voltage at that point.

BJTs are cool.

I could also do it with a BCX70J NPN transistor, with a 1M resistor from a port pin to the base, ground the emitter, and beta limit. That would be a more predictable sink than the dmos fet. Certain geezers wouldn't approve.

John

You just love tweaking "Certain geezers" don't you.

But you're an old geezer yourself.

AND you're as dumb as a stump.

Any 2nd year college student can tell you a more reliable, and cheaper, way to accomplish your minimum load using a port pin. ...Jim Thompson

PSpice has CEIL, FLOOR and INTQ (as well as many others), so "plants" can be behaviorally modeled within an electronic controller. ...Jim Thompson

In this case John is treating the circuit as a plant and simulate the (digital) controller -- but it's the same difference.

On a sunny day (Tue, 30 Mar 2010 08:29:36 -0700) it happened John Larkin wrote in :

LOL

But you could ground the base, and drive the emittor negative via a resistor. Very predictable current if you have negative supply available.

Sorry, no negative supply. So the depletion mode fet, with port pin driving the source, works with zero additional parts. The BCX70 would actually have a more repeatable sink current (the fet has a 3:1 Idss spec, whereas the BCX70J beta spread is under 2:1) but needs the base resistor.

We are very tight for space, so every part matters.

John

You can simulate the analog, digital, or hybrid control loops with SimApp

These can be done in a simple block diagram form.

Peter

How do I make a schematic symbol, a B-source I guess, that's essentially a VCVS with my equation inside it? There's an int() function available for use in equations, so quantization looks pretty easy... scale up, int, scale back down. The HELP is just not specific on how to hook it all up.

Anybody got an example?

John

"John Larkin" schrieb im Newsbeitrag news: snipped-for-privacy@4ax.com...

Hello John,

Here is an example.

Best regards, Helmut

Version 4 SHEET 1 1268 1716 WIRE -960 -256 -992 -256 WIRE -432 -256 -464 -256 WIRE -992 -224 -992 -256 WIRE -464 -224 -464 -256 WIRE -992 -112 -992 -144 WIRE -464 -112 -464 -144 WIRE -464 -16 -480 -16 WIRE -1568 32 -1600 32 WIRE -1232 32 -1264 32 WIRE -992 32 -1024 32 WIRE -864 32 -912 32 WIRE -752 32 -864 32 WIRE -480 32 -480 -16 WIRE -80 32 -480 32 WIRE -64 32 -80 32 WIRE -1600 64 -1600 32 WIRE -1264 64 -1264 32 WIRE -864 64 -864 32 WIRE -480 64 -480 32 WIRE -64 64 -64 32 WIRE -528 80 -576 80 WIRE -752 96 -784 96 WIRE -864 160 -864 128 WIRE -1600 176 -1600 144 WIRE -1264 176 -1264 144 WIRE -528 176 -528 128 WIRE -480 176 -480 144 WIRE -64 176 -64 144 WIRE -1200 272 -1264 272 WIRE -1264 304 -1264 272 WIRE -208 320 -272 320 WIRE -64 320 -128 320 WIRE -64 352 -64 320 WIRE -512 368 -544 368 WIRE -272 368 -272 320 WIRE -1264 416 -1264 384 WIRE -720 416 -752 416 WIRE -512 432 -544 432 WIRE -272 464 -272 448 WIRE -64 464 -64 416 FLAG -528 176 0 FLAG -960 -256 target IOPIN -960 -256 Out FLAG -992 -112 0 FLAG -1264 416 0 FLAG -1200 272 IE IOPIN -1200 272 Out FLAG -480 176 0 FLAG -64 176 0 FLAG -64 464 0 FLAG -272 464 0 FLAG -80 32 VRL FLAG -64 320 VT FLAG -512 368 VT FLAG -512 432 clk FLAG -1600 176 0 FLAG -1568 32 E1 IOPIN -1568 32 Out FLAG -784 96 clk FLAG -752 416 ACTUAL IOPIN -752 416 Out FLAG -1264 176 0 FLAG -1232 32 ER IOPIN -1232 32 Out FLAG -432 -256 clk IOPIN -432 -256 Out FLAG -464 -112 0 FLAG -1024 32 ER FLAG -864 160 0 FLAG -464 -16 DRIVE IOPIN -464 -16 Out SYMBOL e -480 48 R0 SYMATTR InstName E1 SYMATTR Value 1 SYMBOL voltage -992 -240 R0 WINDOW 3 25 91 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(0 20 5.1 1n 1n 50 100) SYMATTR InstName V3 SYMBOL bv -1264 288 R0 SYMATTR InstName B1 SYMATTR Value V=idt(K2*V(E1)/PERIOD) SYMBOL res -80 48 R0 SYMATTR InstName RL SYMATTR Value 1 SYMBOL bv -272 352 R0 WINDOW 3 -15 164 Left 0 SYMATTR InstName B11 SYMATTR Value V=sgn(V(VRL))*10*V(VRL)*I(RL) SYMBOL res -224 336 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName RT SYMATTR Value 1k SYMBOL cap -80 352 R0 SYMATTR InstName CT SYMATTR Value 10m SYMBOL SpecialFunctions\\sample -624 400 M0 WINDOW 39 -100 129 Left 0 SYMATTR InstName A3 SYMATTR SpiceLine Vhigh=100 Vlow=-100 SYMBOL bv -1600 48 R0 SYMATTR InstName B7 SYMATTR Value V=(V(Target)-V(Actual)) SYMBOL SpecialFunctions\\sample -672 64 R0 WINDOW 39 -77 128 Left 0 SYMATTR InstName A1 SYMATTR SpiceLine Vhigh=4 Vlow=-4 SYMBOL bv -1264 48 R0 SYMATTR InstName B12 SYMATTR Value V=K1*V(E1)+V(IE) SYMBOL voltage -464 -240 R0 WINDOW 3 25 91 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(0 1 0 1n 1n {PERIOD/2} {PERIOD}) SYMATTR InstName V1 SYMBOL cap -880 64 R0 WINDOW 3 -57 141 Left 0 SYMATTR InstName C1 SYMATTR Value {PERIOD*.1u} SYMBOL res -1008 48 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R1 SYMATTR Value 1k TEXT -1608 -240 Left 0 !.tran 0 100 0 10m TEXT -1608 -208 Left 0 !.param PERIOD=0.1 TEXT -1184 312 Left 0 ;Integral TEXT -640 288 Right 0 ;ADC TEXT -688 -32 Left 0 ;DAC TEXT -1000 -24 Left 0 ;hold time TEXT -1280 -8 Left 0 ;Regulator TEXT -1616 -8 Left 0 ;Target-Actual TEXT -256 248 Left 0 ;TEC Temperature TEXT -192 -16 Left 0 ;TEC TEXT -1272 -296 Left 0 ;TEC-Controller TEXT -1312 -144 Left 0 !* PI(D) parameters\n.param K1=0.5\n.param K2=20m RECTANGLE Normal 96 560 -336 -48

Thanks, Helmut. LT Spice could use a few more examples, to make it easier for the occasional user.

I figured out a quantizer separately, and posted it yesterday. I'll stick s/h boxes and quantizers (simulating 12 bit ADCs, 10 bit DAC) into my control loop and see if it gets weird.

John