I realize that this might be a better question for a PC Server newsgroup, but I thought electrical engineers might be better familiar with some of the limiting characteristics of the chipsets used for I/O in these systems.
Has anyone compiled benchmarks that show the actual I/O throughput of both PCI and PCI-X buses in current or previous generation HP/Compaq, Dell, and IBM servers? I know the I/O chipsets can often limit the real-world throughput to 1/3 or less of the theoretical maximum.
The question comes up because I want to have some idea of the maximum throughput that could be driven through a 64-bit, 66 MHz PCI card for a storage application. I realize the card itself may have bottlenecks, but I am ignoring those and want to understand the bottlenecks just within the PCI and PCI-X bus.
One server I am looking at is Compaq ML370, which has six PCI-X slots.