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Pullups and mixed voltage

I'm a newbie engineer. I have been assigned a design to modify for a different use. A have a question about a circuit that has nothing to do with the changes I must make. The original designer is gone.

I have an active low 2.5V open drain output with VOL of 0.4Vmax @ 8mA and VOH of 2.1Vmin @ -8mA that drives a LVTTL input with a VIL of .8Vmax and VIH 2.0Vmin (10uA input leakage current). The signal is pulled up to 3.3V with a 4.75K resistor.

Is the open drain output signal pulled up to 3.3V because the input is LVTTL? Wouldn't pulling it up to 2.5V be OK, since VOH is 2.1Vmin and VIH is 2.0Vmin? I'm wondering why the origianl engineer did this because he had to get 3.3V to the pullup, when 2.5V was already there.

I'm confused about the voltages. Why is it OK to pull the open drain output up to 3.3V even though it comes from a 2.5V output. Is this because it's an output? What if I pulled it up to 5V? Is that OK? Why?

Thanks, John

Reply to
John Buxton
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What is your supply voltage? Normally one pulls it to the rails, while minimizing current. Your last paragraph needs clarification.

Reply to
Doug

This device has a 2.5V supply for the I/Os. The signal is connected from this 2.5V device across the board to a 3.3V I/O device. There is also 5V, 1.8V and 1.2V devices on this board.

I was a technician and got promoted to engineer. I haven't take any engineering classes, but I'm trying to learn as I go.

John

Reply to
John Buxton

Just try it, see if it works, and the next stage toggles like it is suppose to. does it go to other stages? If only one LVTTL, or fan out of 5, LLVTTL, should be OK Seems close enough. Pullup to 2.5 volt local chip supply. If it works, try doing it to a lot of 10 and see if they all work the same. Over temp too. It is done a lot like this, having the output pulled up to a different voltage level, called voltage translation. TTL to CMOS similar. With the mixed families you have keep an eye on what this stage has to drive, may explain why the 3.3V, may had to drive 5 volt CMOS. (needs a min of 2.8 volt)

Reply to
artis

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