I saw a circuit where 5 inputs were tied together on a 74HC04 and all the outputs were tied together.
I'm assuming this is done for better current drive but I would think it can cause problems.
What if one gate turns off (or on) a slit second faster or slower? This can cause the chip to pull high current since one gate would be sinking while the other is sourcing.
Maybe I'm wrong, but it's a thought.
Thanks in advance.
Not sure about an HC04, but this is a common technique to increase drive.
That's not likely to happen. The devices are monolithic so track pretty well. The differences in Ton will likely be less than the rise/fall time. You certainly can't get 5x the drive because they won't share perfectly, but a good deal more than the drive of a single driver is possible. Some gates don't see a great benefit from this though since there may be a maximum per-pin current or maximum package current. In this case the ground/power pin is taking the entire current. Also watch the total power dissipation. Check the specs.
It's a good thought, and one always worth checking. In this case it's *probably* alright.
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