74HC161 Question

I have a question about binary counters - the 74HC161 to be exact.
Today I was asked if I knew what a circuit does using this counter. The
circuit had a high on all the inputs except the LSB. The output pin was Qc,
and Qd fed back into the 'load' input.
I knew the counter started at 14 and reset on 0 but I couldn't describe its
It was then explained the circuit divides by 3 because there are only 3
counting states.
School only taught us how to load 0s and 1s to get the chip to count; we
didn't focus on using them as frequency dividers.
Can someone explain what makes this a reconized divide by 3 circuit? What
if I had the chip start at 4 and had another circuit reset the chip on 6?
This would allow the chip to only count to 3, would it still divide by
I believe my confusion is from using the chip as a number loader/counter
and not having much experience with chips as dividers. Maybe someone can
also help me understand why this is confusing for me. :)
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