I was wondering if anyone can help me with this. I'm looking for a circuit-block (SPICE model) that generates a current pulse (according to HBM Standard S5.1) that can be connected to one of the inputs of a chip so that I can simulate the behaviour of the ESD protection circuitry. I know what there should be a cap, resistor, risetime of 2-10ns and pulse width of150ns. But is that enough info for setting up the test bench? Any one has a sample spice deck? The simulations does not have to be very accurate as long as it gives me an idea how to set it up and indication of the behaviour of the ESD protection.
I would really appreciate any help.