Digital servo bitstream

Maybe someone here could help me:

I want to know what the bitstream looks like between the RF stage and the decoder in a JR receiver. I wish to try and build a decoder that would eventually use normal ol' standard cheap servos but give me the security of a PCM receiver.

With all due respect: if you're going to rant about techs and all that crap rather do not make a posting.

Reply to
Pete
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Have a look over in

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they have a DIY electronics forum where there are a number of RX designs and modifications of existing commercial RXs to add micro-based glitch removal and fail-safe.

Reply to
Poxy

| Maybe someone here could help me: | | I want to know what the bitstream looks like between the RF stage | and the decoder in a JR receiver. I wish to try and build a decoder | that would eventually use normal ol' standard cheap servos but give | me the security of a PCM receiver.

What does this have to do with digital servos? You can use standard servos with a PCM receiver, no problem. And you can use digital servos with a standard receiver. As for what is special about a digital servo, here's a bit on that --

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You'll notice that that document doesn't even mention PCM at all ...

As for what the stream looks like, it's not specific to JR, though the shift will be positive for JR/Airtronics and negative for Futaba/Hitec. Things are just reversed if you look at something for Futaba, that's all -- doesn't really change the explanations of how it works, though of course anything you design will have to be able to deal with JR's shift.

Some links that may help are --

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The second and third are probably the most informative -- the first doesn't describe a porportional system. And there's lots more pages out there that describe it -- googling for `R/C pulses ms multiplex PPM FM RX TX' and similar words will find you oodles of pages.

If you have an oscilliscope, hook up a buddy box connector to your radio and put that signal on the oscilliscope, and you can see what the RX receives after the RF stage.

| With all due respect: if you're going to rant about techs and all | that crap rather do not make a posting.

Huh?

Am I permitted to rant about people who can't really make it clear what I'm not permitted to rant about?

Of course, I should mention that there are several R/C receivers out there that do what it sounds like you're suggesting -- many of the new receivers by companies like FMA, Berg, Multiplex and others offer features that used to be PCM-only -- stuff like glitch rejection and failsafes, but still work with a PPM transmitter. That doesn't mean you can't try it yourself, but I'm just letting you know that it's available off the shelf now, and it's probably cheaper than the JR receivers you probably use now.

Reply to
Doug McLaren

The timing of the signal passing between the RF stage and the decoder for a JR PPM receiver looks pretty much like the signal availible out the training port. PCM receivers will be very different, and each manufacturer has a propietary encoding.

Between the RF Stage and the decoder, each channel pulse is actually a complete cycle. I have forgotten the specific polarity, but as I remember, the variable timing portion of the channel signal is the high portion with a fixed low portion following it. A synch period leads the data frame, followed by all of the channel pulses strung together sequentially. Data frames last about 20mS. Channel pulses range from about 1.0 to 2.0 mS in length. On a computer transmitter, the period of the sync pulse is often the difference between 20mS and the sum of all the channel pulses. On a non-computer transmitter the sync pulse is a fixed length, and generally > 5mS. All of these times are pretty flexible from brand to brand and to some extent model to model of radio.

Channel Pulse ___________________________________ | |______ ^ about 600 to 1600uS ^ ^ about 400uS

The decoder in all the PPM receivers that I have looked at has been a simple parallel load, parallel output shift register. The sync period in the data stream allows a cap to charge up and force parallel loading a

00000001 type of pattern. The channel pulses clock the shift register. Individual servos are fed one of the shift register bits as the control signal. This design allows channel mismatches between the receiver and the transmitter. For example, an 8 channel receiver listening to a 4 channel transmitter would load up it's 00000001 pattern at the sync pulse and receive 4 channel pulses before the next sync pulse. Before the next sync pulse arrives, the shift register would look like 00010000 and each of the first four servos would have seen it's pulse. When the next sync pulse arrives, it resets and starts again. Conversly, a 4 channel receiver listening to an 8 channel transmitter would shift the 1 through its 4 channels and then wait through the remaining channel pulses for the sync pulse and reset. All 4 servos would see valid signals.

The data stream is very easy to decode on a microcontroller. If you have questions email me.

Bob Email address is munged, remove the obvious to reply.

Reply to
MetalHead

I went back and looked at my notes and the shift register is a serial in parallel out shift register, not a parallel in parallel out one.

Also, for clarity, here is an ascii sketch of the overall frame. The Channel Pulses are as described above.

_________ __ __ __ { __ __ _________ | |_| |_| |_| | } | |_| |_| |_ { | Sync | CP | CP | CP | CP | CP | Sync | Pulse 1 2 3 N-1 N Pulse

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Reply to
MetalHead

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