J-K Flip Flop help

Apr 18, 2005 2 Replies
P

I have a question about J-K flip flops.



First if all, are ALL J-K flip flops Master-Slave or are there other types?



My book has a clock pulse and the J-K is level triggered. On the positive clock pulse K has a 0 and the J will have a 1, then a 0 and it states that the slave locks onto the 1 and not the 0. So then on the zero part of the clock pulse the slave is triggered and the Q output has a Set on it.


I am confused, if the J changes state (1 to a 0) during the positive cycle , why does the slave latch onto a 1????


Any help would be appreciated.


Thanks!


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R

In my book the JK filp flops have a Q and a !Q if you have an other JK flip flop connected to the Q or !Q then the second will pulse at 1/2 the rate of the first one. but Q and !Q don't latch on a flip flop, If One is high the other low. but on both sets you will have two of the same at each second intervals.

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Q

Perhaps you can visit this page

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Where you can find some basic information, such as truth table, symbol and Verilog code for it.

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